Preemptive Scheduling of a Multiprocessor System with Memories to Minimize Maximum Lateness
نویسندگان
چکیده
We develop an O (q2n + nlogn) algorithm to obtain a preemptive schedule that minimizes maximum lateness when n jobs with given due dates and memory requirements are to be scheduled on m processors (n ≥ m) of given memory sizes. q is the number of distinct due dates. The value of the minimum maximum lateness can itself be found in O(qn + nlogn) time.
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ورودعنوان ژورنال:
- SIAM J. Comput.
دوره 13 شماره
صفحات -
تاریخ انتشار 1984